It is known that, in data processing systems using the virtual memory concept, a logical or virtual address generated by a central processing unit, or CPU, is converted or translated by a memory management unit, or MMU, into a physical address. Depending on the logical address received as an input, the MMU produces as outputs not only the physical address, but also a binary code (destination code) which defines a destination space, for instance, in a multiprocessor system, a memory space internal to the processor which has generated the (logical) address or a memory space of one among other processors. In addition, a field (logical space code) of the logical address, which is not used for the generation of the physical address, defines, within the destination space, a logical space and indicates if the address is related to a working memory or local memory space, to a register space or other resources space.
The destination code issued from the MMU and the logical space code are decoded by a decoder to generate one among a plurality of selection signals, each of which selection signals references and selects the appropriate resource for execution of the requested operation. This decoding operation requires appreciable time. With the availability on the market of integrated circuit components, particularly microprocessors, which evolve to models with improved operating speed performances (while still retaining full logical compatibility with earlier components of the same kind), the problem arises of fully exploiting the higher performances offered by the new components. This end has to be obtained without changing the operating system, the logical structure of the addresses, to assure compatibility of the most recent products with the previous ones, and possibly without any hardware change or with minor changes to the hardware.
A substantive limitation in exploiting the higher speed of the improved microprocessors is imposed by the mechanism through which they communicate with working memories. It is well known that, even if the technology evolution makes available faster memory components, this progress does not keep pace with the new requirements imposed by faster microprocessors. For the most part, this is also true for conventional electronic components such as AND-gates, OR-gates, etc.